Samsung's 3nm process technology is officially taped out

Samsung announced that its 3nm process technology has been successfully taped out! According to the information learned, the 3nm process developed by Samsung uses the GAA architecture, which is said to be able to beat TSMC’s 3nm FinFET architecture in terms of performance.

There are related reports that Samsung and Synopsys have worked together to complete the tapeout of the 3nm process. The main reason why Samsung wants to cooperate with Synopsys is to provide a more perfect and optimized reference solution for the GAA organization's production process more quickly. In addition, because the 3nm process developed by Samsung this time uses the GAA structure, which is completely different from the FinFET structure used by Intel or TSMC, Samsung needs to look for other brand new certifications. Tools and design. This is why Samsung chose to use Synopsys’ Fusion Design Platform.

Asked why Samsung should develop its own semiconductors, Sangyun Kim, as the vice president of Samsung’s semiconductor design and technology team, said about this issue. Samsung’s semiconductors are a very important strategic resource for a technology company, and it is for the promotion of industrial innovation. An indispensable key to a step-by-step process. It is precisely because of this that Samsung has to unremittingly develop and promote technological processes to further meet the ever-increasing wide-ranging market applications and professional needs. The in-depth cooperation between Samsung Electronics' new generation of 3nm GAA structure process technology and Synopsys in the accelerated preheating of Fusion Design Platform is conducive to the successful development of 3nm process technology. This shows how great these key alliances are and how important they are.

There are related reports that the GAA architecture is actually a FinFET architecture surrounded by Gate. Some experts say that for the GAA architecture, its transistors are better than FinFETs in terms of providing electrostatic characteristics. It is such characteristics that are helpful to meet certain gate width requirements. But this is mainly under the condition of the same size structure, GAA's channel control ability has been further strengthened, which makes it possible to further shrink the size. Compared with the traditional FinFET with only three sides covered by the gate, GAA uses the nano-channel design to cover all the outside of the channel by the gate, which shows that the gate is better Control the channel.

Friends who have a certain degree of knowledge about semiconductors may know that the 3nm GAA process technology is classified into two architectures, 3GAAP and 3GAAE. Both of these models use the structure design of nanosheets, and there are many horizontal strip lines inside. In addition, Samsung also said that because the technology uses most of the company's FinFET manufacturing technology and equipment, only a small amount of photomask can be manufactured. Therefore, such technology has very high manufacturability. In addition, its gate controllability is also very good.

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Created on Jul 1st 2021 03:56. Viewed 181 times.

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