Tower Research Interview Questions

Tower Research Capital LLC is a New York-based financial services organisation that focuses on quantitative trading and investment methods. Tower, which was founded in 1998, creates proprietary trading algorithms by employing rigorous statistical techniques to detect non-random patterns in market behavior. By taking advantage of these inefficiencies, the company makes excellent profits while reducing risk. Let’s discuss most asked tower research interview questions:- 

Question: State the difference between RISC and CISC architectures?

Question: Explain shared and static library?

Static Linking and Static Libraries: The linker copies all used library functions to the executable file, resulting in static linking and static libraries. Static linking produces larger binary files that require more disc and main memory space.

Dynamic linking and Dynamic Libraries: Dynamic linking does not necessitate the copying of code. Instead, the library's name is simply placed in the binary file. When the programme is run, both the binary file and the library are in memory, and the linking takes place.

Question:  At the assembly level, how are system calls made? How are low-level IO operations like cout translated?

Software interrupts (int 0x40 in x86 architecture) are used to make system calls, and the system call number and parameters are passed to the software interrupt handler as parameters. Internally, IO operations like cout make system calls to a file descriptor (in this case, a write system call to stdout).

Question:  What exactly is TLB? What is its purpose? What are huge pages and what are their benefits? Between TLB and the cache which one is accessed first? Is it possible to access TLB and cache at the same time?

Huge pages are larger and require fewer TLB entries to store the same amount of data. As a result, a larger virtual address area is cached, resulting in improved speed. TLB is accessed first, followed by the cache, since virtual memory addresses must first be converted to physical memory addresses, which are then utilised to access data from the cache. If the cache is flushed every time the TLB is flushed, the TLB and cache can be accessed in parallel.

Question:  Implement Pow(x,y) in log(n) time complexity?

Pow(x, y) can be implemented in log(n) using the modular exponentiation method.